Configuration
Now that we are all set, we can create a new project using a template.
cargo generate --git https://gitlab.com/bern-rtos/templates/cortex-m.git
Listing: Generate a Bern RTOS based project.
The newly generated project resembles any embedded-hal
based Rust project. However, there are some differences that we will take a look at. First up is the Carog manifest.
[project]/Cargo.toml
[package]
name = "blinky"
version = "0.1.0"
edition = "2021"
[dependencies]
cortex-m-rt = "0.7"
panic-halt = "0.2.0"
bern-kernel = "0.3"1
# Adjust here and in `.cargo/conf.toml` for your device.
[dependencies.stm32f4xx-hal]2
features = ["stm32f411"]
version = "0.13"
[profile.dev.package."*"]3
codegen-units = 1
opt-level = "s"
[patch.crates-io]4
bern-conf = { path = "conf" }
Listing: Cargo manifest.
In the Cargo manifest in the listing the kernel is included at [project]/.cargo/conf.toml
accordingly.
Building Rust applications in debug mode leads to much larger binaries than in release mode. This affects the performance of the RTOS as well. In order to use debug symbols and compromise little on performance, we can enable optimization on the dependencies only
Bern RTOS needs additional configuration values outside the Cargo manifest. This is done using a crate in the user application that replaces the default one. This patch is specified at
[project]/conf/conf.rs
pub const CONF: Conf<0> = Conf {
kernel: Kernel1 {
priorities: 8,
memory_size: Byte::from_kB(2),
},
shared: Shared2 {
size: Byte::from_kB(1),
},
memory_map: MemoryMap3 {
flash: Memory {
link_name: "FLASH",
start_address: 0x0800_0000,
size: Byte::from_kB(512),
},
sram: Memory {
link_name: "RAM",
start_address: 0x2000_0000,
size: Byte::from_kB(128),
},
peripheral: Memory {
link_name: "",
start_address: 0x4000_0000,
size: Byte::from_MB(512),
},
additional: [],
},
data_placement: DataPlacement4 {
kernel: "RAM",
processes: "RAM",
shared: "RAM"
}
};
Listing: Bern kernel configuration.
the listing starts with the kernels internal parameters
Memory protection is currently used to restrict access to stacks within one process only. Access to the flash memory and peripherals is granted to each thread. For the kernel to set appropriate memory protection rules, some memory addresses must be specified
Some microcontrollers offer faster or external memory. We can select where to put the data structures at